发明名称 Memory system anti-aliasing scheme
摘要 Embodiments of the invention are generally directed to systems, methods, and apparatuses for a memory device anti-aliasing scheme. In an embodiment, a memory controller includes an error check agent to receive a codeword from a rank of memory and to provide an error indication in response to detecting a correctable adjacent-symbol-pair-error the rank of memory. An error counter may be coupled with the error check agent to increment towards a threshold value in response to the error indication from the error check agent. In an embodiment, a faulty memory device marker agent coupled with the error counter provides a faulty memory device marker to the error check agent, if the error counter exceeds the threshold value. Other embodiments are described and claimed.
申请公布号 US2007089032(A1) 申请公布日期 2007.04.19
申请号 US20050240823 申请日期 2005.09.30
申请人 INTEL CORPORATION 发明人 ALEXANDER JAMES W.;ROMERA JOAQUIN B.;AGARWAL RAJAT;HOLMAN THOMAS
分类号 G11C29/00 主分类号 G11C29/00
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