发明名称 FLATTENING METHOD OF SEMICONDUCTOR SUBSTRATE AND ITS EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To enable working wherein a current due to voltage applying flows uniformly and surface roughness is excellent, at the time of flattening a semiconductor wafer. SOLUTION: The surface of a silicon wafer 5 retained with a chuck 6 is pressed on an abrasive pad 2 arranged on a table 1, and alkaline liquid 4 is supplied on the abrasive pad 2 from a nozzle 3. A voltage is so applied from a power supply 7 via electrodes 8a and 8b that the wafer 5 has a negative potential and the liquid 4 on the abrasive pad 2 has a positive potential. The surface of the wafer 5 and the abrasive pad 2 are relatively slid via the liquid 4, and the surface of the wafer 5 is polished, away eliminated and flattened. Since the wafer 5 side is made minus, eluation of silicon from the wafer 5 is not generated. Reaction of OH radical contained in alkali of the liquid 4 is generated by heat generation due to an uniform current flow from the working liquid 4, to which a plus voltage is directly applied, to the wafer 5. Thereby function of polishing away the surface of the wafer 5 is moderately generated, and roughness of the surface of the wafer 5 is made excellent.
申请公布号 JPH09289183(A) 申请公布日期 1997.11.04
申请号 JP19960126543 申请日期 1996.04.23
申请人 NIPPON STEEL CORP 发明人 SAKOU YAMATO
分类号 B23H5/00;H01L21/304 主分类号 B23H5/00
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