发明名称 Dynamically modifying a power/performance tradeoff based on processor utilization
摘要 In one embodiment, the present invention includes a multicore processor having a power controller with logic to dynamically switch a power management policy from a power biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level. Thus at low utilizations, reduced power consumption can be realized, while at higher utilizations, greater performance can be realized. Other embodiments are described and claimed.
申请公布号 US9372524(B2) 申请公布日期 2016.06.21
申请号 US201113326605 申请日期 2011.12.15
申请人 Intel Corporation 发明人 Sistla Krishnakanth V.;Rowland Mark;Varma Ankush;Steiner Ian M.;Bace Matthew;Borkowski Daniel;Garg Vivek;Akturan Cagdas;Ananthakrishnan Avinash N.
分类号 G06F1/00;G06F1/32 主分类号 G06F1/00
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. A processor comprising: a plurality of cores and a power controller, the power controller including a logic having circuitry to dynamically update a power management policy for a system including the processor from a power saving biased policy to a performance biased policy when a utilization of the processor exceeds a threshold level, wherein the logic is to dynamically tune a loadline from the power saving biased policy to the performance biased policy when a ratio of a duration of a maximum performance state residency of the plurality of cores during an evaluation interval to a duration of an active state residency of the plurality of cores during the evaluation interval exceeds the threshold level.
地址 Santa Clara CA US