Block aligner-based dead cycle deskew method and apparatus

摘要

A method and apparatus to deskew dead cycles is described using a block aligner. In one example a method includes receiving a sequence of bytes into a first buffer from each lane of a multiple lane peripheral device bus and receiving the sequence of bytes into a second buffer delayed one clock cycle from the first buffer. The method further includes providing the sequence of bytes from the first buffer to an output buffer, counting clock cycles of data as the data is received into the first and second buffers, upon reaching a predetermined count, inserting a dead cycle into the output buffer, and after inserting the dead cycle providing the sequence of bytes from the second buffer instead of the first buffer to the output buffer.

主权项

1. A method comprising:
receiving a sequence of bytes into a first buffer from each lane of a multiple lane peripheral device bus, wherein the sequence of bytes combine to form packets, the packets including dead cycles and wherein each byte of the sequence of bytes is received in one of a sequence of clock cycles; receiving the sequence of bytes also into a second buffer delayed one clock cycle from the first buffer; providing the sequence of bytes from the first buffer to an output buffer counting clock cycles of data as the data is received into the first and second buffers; upon reaching a predetermined count, inserting a dead cycle into the output buffer; and after inserting the dead cycle providing the sequence of bytes from the second buffer instead of the first buffer to the output buffer.