发明名称 WIRING CIRCUIT AND IMAGE FORMING APPARATUS
摘要 PROBLEM TO BE SOLVED: To suppress distortion of a wave form of a differential clock signal to be input to a DDR memory.SOLUTION: A wiring circuit 100 comprises: a differential transmission line 4 that consists of two signal lines 4a and 4b transmitting differential clock signals; a control circuit 2 that outputs the differential clock signals to the differential transmission line 4; a DDR memory 3 that includes two input terminals 31a and 31b receiving input of the differential clock signals, and reads and writes data in synchronization with the differential clock signals input to the two input terminals 31a and 31b; and a termination circuit 5 that matches the characteristic impedance of the differential transmission line 4 with the input impedance in the two input terminals 31a and 31b. In the wiring circuit 100, one end of the differential transmission line 4 is connected to the control circuit 2; the other end of the differential transmission line 4 is connected to the termination circuit 5; and the two input terminals 31a and 31b are respectively connected to branch points 41a and 41b provided respectively on the two signal lines 4a and 4b.SELECTED DRAWING: Figure 2
申请公布号 JP2016134118(A) 申请公布日期 2016.07.25
申请号 JP20150010082 申请日期 2015.01.22
申请人 KYOCERA DOCUMENT SOLUTIONS INC 发明人 KAWAOKA MIKI
分类号 G06F13/16;G06F12/00;H05K1/02 主分类号 G06F13/16
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