发明名称 COMMUNICATION SYSTEM
摘要 PURPOSE:To perform two-way communication efficiently through a two-line full duplex communication system, by discriminating the positive, negative, or zero of a signal voltage on a communication line and obtaining data to be received through logical arithmetic on the basis of the discrimination result. CONSTITUTION:Transmitted information SA applied to an input terminal 32 is driven by a driving circuit 30 and sent to a communication line 34 through a resistance 31. The information from the communication line 34 is led to comparatoras 35 and 36 differing in comparison level. Comparison results C1 and C2 of the comparators 35 and 36 are both ''1'' when the communication line voltage is plus, and C1=''0'' and C2=''1'' when zero; and C1=C2=''0'' when the communication line voltage is negative. Those detection results are sent to a decision circuit 37 together with the transmitted data SA, and on the basis of the decision result, data to be received is obtained through logical arithmetic.
申请公布号 JPS5836045(A) 申请公布日期 1983.03.02
申请号 JP19810134739 申请日期 1981.08.26
申请人 MATSUSHITA DENKI SANGYO KK 发明人 DESAKI YOSHITO
分类号 H04B3/20;H04L5/14 主分类号 H04B3/20
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