发明名称 FREQUENCY SYNTHESIZER EQUIPPED WITH DIGITAL PHASE DETECTOR HAVING OPTIMUM STEERING AND LEVEL TYPE LOCKING DISPLAY
摘要 PURPOSE: To obtain the synthesizer with an optimum phase gain characteristic by detecting a phase error between 1st and 2nd frequency signals and generating corresponding increasing and decreasing steering signals. CONSTITUTION: A synthesizer 110 uses a VCO 112 providing an output signal 114 phase-locked to a reference signal 116 given from a crystal oscillator 117. The signal 114 is frequency-divided by a 1/2 frequency divider 112 and a frequency signal 120 is obtained, A frequency and a phase of the signal 116 and those of the signal 120 are compared by a phase detector 118, from which upward U and downward D steering signals 126 indicating optimizingly the steering direction are generated. Since a correction circuit 124 corrects a frequency of the VCO 112 to allow the signal 114 traces the phase of the signal 116, an error voltage is generated. Moreover, the detector 118 generates a phase lock display 128 to display when a microcomputer 119 indicates that the signals 116, 120 denote phase locking.
申请公布号 JPH01162417(A) 申请公布日期 1989.06.26
申请号 JP19880292245 申请日期 1988.11.18
申请人 MOTOROLA INC 发明人 GEERII EFU KATSUTSU
分类号 H03L7/085;G01R25/00;H03J7/06;H03L7/089;H03L7/095;H03L7/18;H03L7/183 主分类号 H03L7/085
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