| 摘要 |
<p>PROBLEM TO BE SOLVED: To make it unnecessary to prepare a delay circuit such as a timer for power interruption, to reduce the number of parts and to miniaturize an equipment by using a watchdog timer(WDT) also as a delaying timer in common. SOLUTION: When power interruption is generated, a power interruption detecting circuit 3 outputs a power interruption signal to a CPU 1. The CPU 1 stops the timer refresh operation of the WDT 2 to make the WDT 2 up, stores information indicating the existence of power interruption in a memory 4, and then stops operation. When the power supply is recovered, the circuit 3 outputs the power recovery to the CPU 1. Then the CPU 1 starts its operation and allows the WDT 2 to stop the time-up state. The stopped WDT 2 refreshes the timer and outputs a reset signal to the CPU 1. Then the CPU 1 reads out abnormal processing state stored in the memory and newly starts the execution of a program.</p> |
