Trench isolation formation for minimizing the narrow channel effect of a transistor especially in a DRAM chip

摘要

A trench isolation is formed with an embedded conductive screen (214a) connected to a current supply line (240) for controlling transistor threshold voltage. A trench isolation formation process comprises: (a) forming a trench isolation with an embedded conductive screen (214a), surrounding a semiconductor substrate active region (201); (b) forming a transistor (220) on the active region; (c) forming an insulating interlayer (224); and (d) forming, on the interlayer, a current supply line (240) in electrical connection with the screen (214a) for controlling the transistor threshold voltage. An Independent claim is also included for a semiconductor component with a trench isolation produced by the above process. Preferred Features: The conductive screen consists of polysilicon, a metal or a silicide. The trench insulation consists of O3-TEOS, SACVD (sub-atmospheric CVD) or HDP (high density plasma) oxide.