| 摘要 |
PROBLEM TO BE SOLVED: To provide a high frequency transistor having multi-electrode terminals that enable to enhance transistor's fT and fmax by reducing the total parasitic capacitance between the base and the collector electrode. SOLUTION: This high frequency transistor comprises an emitter electrode terminal 1, a base electrode terminal 2, a first polysilicon layer 4 as the base electrode terminal 2, a N type buried layer 5 as the collector electrode terminal 3, an epitaxial layer 6 above the N type buried layer 5, and a field oxide 7 formed between the first polysilicon layer 4 and the epitaxial layer 6. In the device, the layout of the electrodes is as follows: the base electrode terminal 2 is positioned at both ends, the emitter electrode terminal 1 inside the base electrode terminal 2, the collector electrode terminal 3 is formed inside the emitter electrode terminal 1, then the emitter electrode terminal 1 and the base electrode terminal 2 are formed inside the collector electrode terminal 3.
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