| 摘要 |
PURPOSE:To improve the performance characteristics of the sections of I<2>L elements by a method wherein two types of I<2>L structures are built with their N-epitaxial layers different in thickness under base regions for the co-existence of high-speed and low-speed sections. CONSTITUTION:An N<-> epitaxial layer 2 is thinner under the base region of a high-speed I<2>L section than under the base region of a low-speed I<2>L section. For example, an N-type epitaxial layer 2 is formed on a high-concentration N-type semiconductor substrate 1 and the portion to mount a high-speed I<2>L section is selectively removed by approximately 1mum. N<+> collar regions 3, base regions 4a and 4b, injector regions 5a and 5b, and collector regions 6a and 6b are formed, and then an aluminum wiring 7 is built. The selective removal of the epitaxial layer 2 is accomplished for example by using the LOCOS method and the oxide film etching method. With the device designed as such, the high-speed section is improved in terms of the minimum delay time for the ensurance of higher-speed operation and the low-speed section is reduced in its power delay time product. In this way, both high-speed and low-speed sections are improved in their performance characteristics. |
