| 摘要 |
An apparatus for testing an integrated circuit includes a clock generator; a first memory for storing at least one instruction data, and a second memory for storing input data and corresponding expected output data employed in testing. A control unit controls the output of the input data and expected output data in accordance with the content of the instruction data. A counter counts clocks output from the generator. A register circuit stores at least one designated value. A comparing circuit outputs at least one control signal based on the comparison between the designed value and a value of the counter. A circuit defining a first timing data, representing a mode of application of a test pattern, and at least one second timing data, representing a mode of application different from the first timing data, outputs one of the first or second timing data in response to the control signal. A testing circuit applies the input data to the integrated circuit and compares a response signal from the integrated circuit with the expected output data, whereby it is determined whether the integrated circuit is functional or non-functional. By suitably changing the designated value in the register circuit, the mode of application of the test pattern can be easily changed when the test is carried out with an arbitrary test pattern, and at the same time, a change in writing into the second memory is made unnecessary. Thus, a more efficient test is realized.
|
