Efficient Amplifier Sharing in a Multi-stage Analog to Digital Converter

摘要

An analog to digital converter (ADC) containing an operational amplifier having a first pair of input terminals and a second pair of input terminals, wherein the output varies if the input signals on either of the input terminals pairs is changed in either the sampling phase or a hold phase. Such an operational amplifier is conveniently shared by two stages of a ADC, while reducing power consumption as well as errors.