发明名称 Apparatus and method extending flip-chip pad structures for wirebonding on low-k dielectric silicon
摘要 A method and apparatus for making pad structures suitable for wirebonding and, optionally, also for solder-ball connections. Some embodiments include an electronics chip having a substrate with circuitry, a compliant electrically insulating layer deposited on at least a portion of the substrate, and an electrical connection pad, the pad having an electrical connection to the circuitry through an aperture in the insulating layer and a peripheral bonding zone region extending over the insulating layer. In some embodiments, the bonding zone is exclusively over the insulating layer outside of the aperture. In some embodiments, the pads are suitable for both solder-ball and wirebond connections. By making a wirebond connection to an area of a pad over the compliant insulating layer, the underlying circuitry is protected from ultrasonic energy of the bonding process.
申请公布号 US7262513(B2) 申请公布日期 2007.08.28
申请号 US20050172717 申请日期 2005.06.30
申请人 INTEL CORPORATION 发明人 MATHEW RANJAN J.
分类号 H01L29/40;H01L23/485 主分类号 H01L29/40
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