发明名称 |
Repair techniques for memory with multiple redundancy |
摘要 |
In one aspect, the present invention features techniques for generating a repair solution for a memory having a set of IOs including a plurality of main IOs and a plurality of redundant IOs. For example, techniques are provided for selecting a mapping between input/output ports of the memory and a subset of the memory's IOs. In particular, techniques are provided for configuring a plurality of multiplexors to implement the selected mapping by establishing electrical connections between the subset of IOs and the memory input/output ports. The subset of IOs may include one or more of the plurality of redundant IOs which effectively replace one or more defective ones of the main IOs. The plurality of multiplexors may be configured by generating one or more thermometer codes which encode the identities of any defective main IOs and which serve as selection inputs to the plurality of multiplexors.
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申请公布号 |
US7328378(B2) |
申请公布日期 |
2008.02.05 |
申请号 |
US20060507272 |
申请日期 |
2006.08.21 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
HOWLETT WARREN KURT |
分类号 |
G11C11/413;G11C29/00;G11C29/04 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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