SELF-ALIGNMENT METHOD OF DEPOSITING SEMICONDUCTOR METALLIZATION

摘要

A method of manufacturing devices in a semiconductor body of a first conductivity type. An oxygen impervious masking medium is placed on the body. Portions of the medium are removed to define field areas and field oxide is formed in the field areas. The surface of the silicon wafer is thereafter masked to define gate areas 26 and electrical contact areas. The exposed medium is removed and the exposed body areas doped to form interconnect runs and a source/drain region of a second conductivity type. An oxide is formed over the doped interconnect runs and source/drain regions of the wafer. The masking medium covering the contact area is removed and the contact area is doped to a second conductivity type. Finally conductors are positioned to provide the desired electrical connections. In a first alternate embodiment the masking medium is a sandwich of different material layers and in a second alternate embodiment the masking medium is a sandwich of three different layers. The method produces devices with improved frequency response and more economical utilization of the semiconductor surface area by reducing critical mask alignments.