| 摘要 |
PURPOSE:To enable fast arithmetic processing and to reduce the scale of a circuit by inputting data which is stored in a register to a data selector through a register array. CONSTITUTION:For example, data A is inputted to the data selector 8 through a 1st data bus 1A and data B is inputted to the data selector 8 from a 2nd register 3 through a 3rd register 4. The data A and B are inputted to a computing element 7. The output of the computing element 7 is stored in a 1st register 2 through a 2nd data bus 1B. Consequently, the output of data from a register and the input of data to a register are carried out through different data buses, fast arithmetic processing equivalent to a three-bus system is enabled, and data are inputted to the computing element through registers which are connected in array, so only two data buses are required, the circuit is simplified, and the circuit scale is reduced. |
