发明名称 Merge device using FIFO buffers
摘要 Input FIFO buffers serve to store sorted data. A number of the input FIFO buffers equals a first predetermined number N equal to 2n where n denotes a second predetermined number. A number of comparators equals the second predetermined number n. Intermediate FIFO buffers each have a capacity corresponding to at least two words. A number of the intermediate FIFO buffers equals the first predetermined number N minus 2. Identification numbers (i,j) are assigned to the intermediate FIFO buffers respectively wherein i=1, n-1 and where j=1, 2(n-1). A first of the comparators outputs a merge result of an i-th of the input FIFO buffers and an (i+N/2)-th of the input FIFO buffers to a (1,i)-th of the intermediate FIFO buffers where i=1, N/2. A j-th of the comparators outputs a merge result of a (j-1,i)-th of the intermediate FIFO buffers and a (j-1,i+2(n-i)-th of the intermediate FIFO buffers to a (j,i)-th of the intermediate FIFO buffers where j=2, n-1 and where i=1, 2(n-i). An n-th of the comparators outputs a merge result of an (n-1,1)-th of the intermediate FIFO buffers and an (n-1,2)-th of the intermediate FIFO buffers to an output FIFO buffer.
申请公布号 US5274835(A) 申请公布日期 1993.12.28
申请号 US19920958465 申请日期 1992.10.08
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 WAKATANI, AKIYOSHI
分类号 G06F7/32;(IPC1-7):G06F7/14 主分类号 G06F7/32
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