发明名称 ASYNCHRONOUS DIGITAL RECEIVING CIRCUIT
摘要 Signals output from a first and a second lowpass filters(108,109) are provided to a first and a second A/D converters(126,127), respectively, to be digitalized. These digitally converted signals are multiplied with a pseudo noise(PN) at a first and a second multipliers(110,111), then transmitted to a first and a second accumulators(124,125). The transmitted signals are accumulated at the first and the second accumulators(124,125) as much as the baseband code section(T), outputs from the first and the second accumulators(124,125) being transmitted to a digital complex computing means(A2), where the outputs of the first and the second accumulators(124,125) are processed under digital computation, results of that computation being provided to an acquisition and a PN code tracking circuit.
申请公布号 KR0128171(B1) 申请公布日期 1998.04.10
申请号 KR19940026236 申请日期 1994.10.13
申请人 SAMSUNG ELECTRONICS CO.,LTD 发明人 KIM, DUK-HYUN
分类号 H04L7/00;(IPC1-7):H04L7/00 主分类号 H04L7/00
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