Sensing circuit for a floating gate memory device having multiple levels of storage in a cell

摘要

A sensing circuit for sensing the multiple states of a selected memory cell of a floating gate memory device is disclosed. The sensing circuit has a first voltage amplifier which generates a first output voltage, and a plurality of current amplifiers which receive the first output voltage and generate a plurality of first output currents in response thereto. The circuit also comprises a dummy cell, a second voltage amplifier connected thereto for generating a second output voltage. A second current amplifier receives the second output voltage and generates a plurality of second output currents in response thereto. Each of a plurality of inverters receives one of the first and one of the second output currents, and generates an output. The output of the plurality of invertors are supplied to a decoder to generate a decoded signal representative of the plurality of states of the selected memory cell.