LOOP ACCELERATOR AND PROCESSING SYSTEM FOR DATA HAVING IT

摘要

A loop accelerator and a data processing system including the same are provided to facilitate modification of a structure and save expenses by simplifying a connection structure between a configuration memory and multiple processing elements. Each processing element(140) performs an operation of a word unit to process a program. The configuration memory(100) stores configuration bits representing the operation, action, and a status of each processing element. Each context memory(120) is installed to a row or column direction of each processing element, and transfers the configuration bits from the configuration memory along an arrangement direction of the processing elements. The context memory includes a shift register(130) temporarily storing the configuration bits from the configuration memory, a counter(125) counting the number of configuration bits provided from the shift register, and a comparator(127) comparing the number of configuration bits with the number of processing units.