发明名称 Method for manufacturing semiconductor device having via holes
摘要 In a method for manufacturing a semiconductor device wherein via holes are formed in an SiC substrate, a stacked film consisting of a Ti film and an Au film is formed on the back face of the SiC substrate, and a Pd film is formed thereon. Then, an Ni film is formed by non-electrolytic plating, using the Pd film as a catalyst. Thereafter, via holes penetrating through the SiC substrate are formed by etching, using the Ni film as a mask.
申请公布号 US7288486(B2) 申请公布日期 2007.10.30
申请号 US20060472384 申请日期 2006.06.22
申请人 MITSUBISHI ELECTRIC CORPORATION 发明人 SHIRAHAMA TAKEO;SHIGA TOSHIHIKO;HORI KOUICHIROU
分类号 H01L21/461 主分类号 H01L21/461
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