| 摘要 |
A high voltage field effect transistor includes a source region in a first major surface of a semiconductor body and a drain region in a second major surface of the semiconductor body. A first gate region is formed in the first major surface and is surrounded by the source regions. A second gate region surrounds the source region and includes a buried region extending into the semiconductor body between the source and drain regions. The buried gate structure can be fabricated by epitaxial grown over diffused regions in a semiconductor substrate, or alternatively ion implantation can be employed to form the buried gate regions.
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