发明名称 |
SOFTWARE CONFIGURABLE MEMORY ARCHITECTURE FOR DATA PROCESSING SYSTEM HAVING GRAPHICS CAPABILITY |
摘要 |
A graphics data processing system memory is allocatable by software between system memory and graphics framebuffer storage. The memory comprises two-port elements connected in parallel from the RAM port to a controller connected to a bus, and having serial output ports connected to output circuitry to map the storage to a display. Corresponding locations, relative to element origin, in all elements are addressed in parallel as an array. Three modes of memory transactions are all accomplished as array accesses. First, a processor reads/writes the system memory portion by a combination of parallel array access and transfers between controller and bus in successive bus cycles. Second, the controller executes atomic graphics operations on the framebuffer storage using successive array accesses; third, the processor can read/write a framebuffer pixel, by an array access of framebuffer storage with masking of unaddressed pixels. An interface arbitrates among requests for memory access. |
申请公布号 |
CA1312963(C) |
申请公布日期 |
1993.01.19 |
申请号 |
CA19880583846 |
申请日期 |
1988.11.23 |
申请人 |
DIGITAL EQUIPMENT CORPORATION |
发明人 |
KELLEHER, BRIAN;FURLONG, THOMAS C. |
分类号 |
G06F12/00;G06F12/06;G06T1/20;G06T1/60;G09G5/36;G09G5/39 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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