Switched capacitance voltage multiplier with commutation

摘要

A voltage multiplier is constructed using a series combination of capacitors and an associated switching circuit which provides for charging each capacitor in the series by sequentially connecting each capacitor to a d.c. input voltage. The d.c. input voltage of N volts is converted to an a.c. output voltage of peak-to-peak 2*(N+1) times the input voltage where N is the number of capacitors in the series. A pattern of sequential switching is chosen to generate a sequentially rising and falling voltage to form a half waveform. A commutator couples the half waveform to a pair of output terminals in an alternating polarity to form the completed a.c. output voltage.