| 摘要 |
A delay for short power interruptions by using a first comparator to compare the power supply voltage to a voltage reference. A second comparator has a first input coupled to the same voltage reference, and an output which generates the reset signal. A capacitor coupled to the second input of the second comparator determines when a reset signal is issued. The capacitor is normally charged by a current source. When the power supply falls below a set point indexed to the reference voltage, as indicated by the first comparator, a discharging circuit discharges the capacitor. The rate at which the capacitor is discharged and the threshold of the second comparator determines how long of a power interrupt is required to issue a reset signal. In the preferred embodiment, the discharging circuit is a latching current source. The current source is latched into the on position by the output of the comparator, and is reset when the comparator indicates that the voltage supply is returned to normal. When reset, the discharging current source is turned off.
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