| 摘要 |
A cost-effective packaging system (10) for ultra high density input/output (integrated circuits (14). The packaging system includes a first circuit chip (14) that has a first pattern of contacts (16) distributed across a surface area of the chip (14). The first pattern of contacts (16) represents input/output connections (16). A three-dimensional circuit (18) is disposed spatially parallel with respect to the first circuit chip (14) and organizes the input/output connections (16) into a second pattern of contacts (24, 30) suitable for connection to a second circuit (22). In a specific embodiment, the three-dimensional circuit (18) is a double sided DECAL (18). The double-sided DECAL (18) includes a substrate (18) having a first circuit pattern (28) spatially parallel with a second circuit pattern (30) on or in the substrate (18). The first and second circuit patterns (28 and 30) are interconnected. The first circuit pattern (28) has a third pattern of contacts (16) coincident with the first pattern of contacts (16) on the first circuit chip (14). The first circuit pattern (28) and/or the second circuit pattern (30) are ball grid arrays or coaxial connector arrays. The second circuit (22) is disposed spatially parallel with respect to the three-dimensional circuit (18). The second circuit (22) is a ceramic or laminate interposer that facilitates further organization of the input/output connections (16, 24). The interposer (18) includes a ball grid array (24) or a coaxial connector grid array (18) to facilitate the organization. A z-axis adhesive (20) is disposed between the interposer (22) and the three-dimensional circuit (18). A non-hermetic sealer (12) disposed over the first circuit chip (14).
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