发明名称 |
DECODER CIRCUIT FOR HIGH DEFINITION TELEVISION SIGNAL |
摘要 |
PURPOSE:To attain normal edge processing even at picture freeze by detecting an edge part of a picture from a high definition television signal at normal reproduction and detecting the edge part of the picture from a data stored in a field memory circuit being a 1st means at a request of the freeze picture so as to select switchingly a picture at the normal reproduction and a freeze picture at the request. CONSTITUTION:A changeover switch 21, through which a video signal S2 from a nonlinear edge detection circuit 21 at normal reproduction and an output signal S8 of a 2nd field memory 133 pass and the leadout signal S14 is fed to an edge detection circuit 16. Thus, the edge detection circuit 16 detects the edge part from the video signal S2 at normal reproduction and detects the edge part from the output signal S8 of the 2nd field memory 133 to attain normal edge signal processing in both the cases. Thus, the normal signal processing is applied even at picture freeze thereby preventing the deterioration in the picture quality of the freeze picture. |
申请公布号 |
JPH02151189(A) |
申请公布日期 |
1990.06.11 |
申请号 |
JP19880303968 |
申请日期 |
1988.12.02 |
申请人 |
NIPPON HOSO KYOKAI <NHK>;TOSHIBA CORP |
发明人 |
NINOMIYA YUICHI;SHISHIKUI YOSHIAKI;OMURA TOSHIRO;ICHIKAWA TEIICHI;KATAGIRI TAKAHITO;MINAMI TOMIO |
分类号 |
H04N19/423;H04N7/00;H04N7/015;H04N11/00;H04N11/04;H04N11/24;H04N19/00;H04N19/51;H04N19/543;H04N19/587;H04N19/59;H04N19/85 |
主分类号 |
H04N19/423 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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