发明名称 |
Copper alloy interconnection layer |
摘要 |
<p>In a damascene method, trenches in interlayer insulation 12 are filled with a barrier layer, a seed layer and a copper containing layer 17. The surface of the copper layer 17 is kept free of copper oxide by not exposing the device to an oxygen containing atmosphere. The oxide-free surface of the copper is subjected to a N2 or NH3 nitriding plasma treatment to form a copper nitride (CuN) layer 24. A silicon containing copper diffusion prevention layer 18 (e.g. SiN, SiON, SiC, SiCOH) is formed by plasma CVD. The copper nitride layer 24 suppresses diffusion of silicon into the copper layer 17 such that the thickness of the copper silicide layer is reduced. Interconnection resistance is thus reduced.</p> |
申请公布号 |
GB2409767(A) |
申请公布日期 |
2005.07.06 |
申请号 |
GB20050006567 |
申请日期 |
2002.02.18 |
申请人 |
* NEC ELECTRONICS CORPORATION |
发明人 |
HIDEMITSU * AOKI;HIROAKI * TOMIMORI;NORIO * OKADA;TATSUYA * USAMI;KOICHI * OHTO;TAKAMASA * TANIKUNI |
分类号 |
H01L21/02;H01L21/314;H01L21/316;H01L21/318;H01L21/768;H01L23/532;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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