发明名称 Express virtual channels in an on-chip interconnection network
摘要 A method, router node, and set of instructions for using express virtual channels in a component network on a chip are disclosed. An input link 302 may receive an express flow control unit from a source node 102 in a packet-switched network via an express virtual channel 110. An output link 306 may send the express flow control unit to a sink node 106. A switch allocator 322 may forward the express flow control unit directly to the output link 306.
申请公布号 US9391913(B2) 申请公布日期 2016.07.12
申请号 US201213551537 申请日期 2012.07.17
申请人 Intel Corporation 发明人 Kumar Amit;Kundu Partha P
分类号 H04L12/28;H04L12/801;H04L12/701;H04L12/721;H04L12/851;H04L12/933 主分类号 H04L12/28
代理机构 Alpine Technology Law Group LLC 代理人 Alpine Technology Law Group LLC
主权项 1. A method, comprising: receiving an express flow control unit from a source node via an express virtual channel; and forwarding the express flow control unit directly to an output link to send to a sink node based on a comparison of a starvation counter value and a starvation threshold value, wherein the starvation counter is to be updated each time a normal flow control unit, destined for the same output port as the express flow control unit, is buffered, wherein the express flow control unit is to be given preference over other non-express flow control units based only on a determination that the express flow control unit is traveling on the express virtual channel, wherein the express flow control unit bypasses one or more intermediate nodes along one or more pre-defined paths between pairs of nodes, without the express flow control unit being buffered.
地址 Santa Clara CA US
您可能感兴趣的专利