发明名称 |
APPARATUS FOR CONTROLLING INVERSE FAST FOURIER TRANSFORM INPUT IN LONG TERM EVOLUTION SYSTEM |
摘要 |
Disclosed is an apparatus for controlling an IFFT input in a LTE system. The apparatus includes: a first multiplexer configured to select a portion of data applied to a first stage of a Fast Fourier Transform (FFT) structure according to a predefined condition from among input data, and assign the selected data to a memory of the first stage; a butterfly operator configured to receive the portion of data selected by the first multiplexer and perform a butterfly operation for the first stage of the FFT structure using the received data; a multiplier configured to output a value obtained by multiplying a result value output from the butterfly operator and a predetermined value together; and a second multiplexer configured to receive a value output via the multiplier, and remaining data not selected by the first multiplexer to output to a second stage of the FFT structure. |
申请公布号 |
US2016210265(A1) |
申请公布日期 |
2016.07.21 |
申请号 |
US201514982846 |
申请日期 |
2015.12.29 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JANG IN GUL |
分类号 |
G06F17/14 |
主分类号 |
G06F17/14 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus for controlling an Inverse Fast Fourier Transform (IFFT) input in a Long Term Evolution system (LTE) system, the apparatus comprising:
a first multiplexer configured to select a portion of data applied to a first stage of a Fast Fourier Transform (FFT) structure according to a predefined condition from among input data, and assign the selected data to a memory of the first stage; a butterfly operator configured to receive the portion of data selected by the first multiplexer and perform a butterfly operation for the first stage of the FFT structure using the received data; a multiplier configured to output a value obtained by multiplying a result value output from the butterfly operator and a predetermined value together; and a second multiplexer configured to receive a value output via the multiplier, and remaining data which is not selected by the first multiplexer to output to a second stage of the FFT structure. |
地址 |
DAEJEON KR |