发明名称 FLASH MEMORY SYSTEM AND OPERATING METHOD THEREOF
摘要 An operation method of a flash memory system includes: performing hard decision decoding on a codeword, which is encoded in units of message blocks with row constituent codes and column constituent codes according to a block-wise concatenated BCH (BC-BCH) method; identifying a location of an error message block to which the hard decision decoding fails among a plurality of the message blocks, when the hard decision decoding fails; generating soft decision information corresponding to the row constituent codes and the column constituent codes of the error message block; and performing soft decision decoding on the error message block based on the soft decision information.
申请公布号 US2016210190(A1) 申请公布日期 2016.07.21
申请号 US201514802833 申请日期 2015.07.17
申请人 SK hynix Inc. ;Korea Advanced Institute of Science and Technology 发明人 HA Jeong-Seok;KIM Dae-Sung;JEONG Su-Hwang
分类号 G06F11/10;H03M13/29;H03M13/15;G11C29/52 主分类号 G06F11/10
代理机构 代理人
主权项 1. An operation method of a flash memory system having a controller and a memory device, the operation method comprising: performing hard decision decoding on a codeword, which is encoded in units of message blocks with row constituent codes and column constituent codes according to a block-wise concatenated BCH (BC-BCH) method; identifying a location of an error message block to which the hard decision decoding fails among a plurality of the message blocks, when the hard decision decoding fails; generating soft decision information corresponding to the row constituent codes and the column constituent codes of the error message block; and performing soft decision decoding on the error message block based on the soft decision information.
地址 Gyeonggi-do KR