发明名称 MULTI-STEP PROGRAMMING OF HEAT-SENSITIVE NON-VOLATILE MEMORY (NVM) IN PROCESSOR-BASED SYSTEMS
摘要 Multi-step programming of heat-sensitive non-volatile memory (NVM) in processor-based systems, and related methods and systems are disclosed. To avoid relying on programmed instructions stored in heat-sensitive NVM during fabrication, wherein the programmed instructions can become corrupted during thermal packaging processes, the NVM is programmed in a multi-step programming process. In a first programming step, a boot loader comprising programming instructions is loaded into the NVM. The boot loader may be loaded into the NVM after the thermal processes during packaging are completed to avoid risking data corruption in the boot loader. Thereafter, the programmed image can be loaded quickly into a NV program memory over the peripheral interface using the boot loader to save programming time and associated costs, as opposed to loading the programmed image using lower transfer rate programming techniques. The processor can execute the program instructions to carry out tasks in the processor-based system.
申请公布号 US2016246608(A1) 申请公布日期 2016.08.25
申请号 US201514627318 申请日期 2015.02.20
申请人 QUALCOMM Incorporated 发明人 Newham Adam Edward;Attar Rashid Ahmed Akbar;Kang Seung Hyuk;Kim Jung Pill;Kim Sungryul;Kim Taehyun
分类号 G06F9/44;G06F13/28;G06F12/02 主分类号 G06F9/44
代理机构 代理人
主权项 1. A processor-based system, comprising: a magnetic random access memory (MRAM) configured to store a programmed image comprising program instructions; a processor configured to access the program instructions stored in the programmed image in the MRAM and execute the program instructions; a peripheral interface configured to exchange data between the processor and an external programming device communicatively coupled to the peripheral interface; and a first non-volatile memory (NVM) configured to store a programmed boot loader comprising programming instructions configured to be executed by the processor to exchange data with the peripheral interface; the processor configured to execute the programming instructions in the programmed boot loader in the first NVM to: receive the programmed image over the peripheral interface from an external programming device communicatively coupled to the peripheral interface; andload the received programmed image into the MRAM.
地址 San Diego CA US