发明名称 SYNCHRONIZATION CIRCUIT FOR RECEIVING AND REGENERATING TIMING SIGNALS IN A SYNCHRONIZED DIGITAL TRANSMISSION SYSTEM
摘要 A control circuit couples the bit synchronization extraction circuit to the phase controlled oscillator of a synchronization circuit and transfers the synchronization component from the extraction circuit to the oscillator to control the phase of the oscillator when the signal-to-noise ratio of the synchronization component is at least at a predetermined level and prevents the transfer of the synchronization component to the oscillator to prevent phase control of the oscillator when the signal-to-noise ratio is below the predetermined level.
申请公布号 US3646269(A) 申请公布日期 1972.02.29
申请号 USD3646269 申请日期 1969.06.18
申请人 FUJITSU LTD. 发明人 ISAO FUDEMOTO;KIYOSHI TOMIMORI;EIICHI NAKAMURA;YUTAKA KIMURA
分类号 H04J3/06;H03K5/00;H04L7/02;H04L7/027;(IPC1-7):H04L7/04 主分类号 H04J3/06
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