发明名称 PHASE LOCKED CIRCUIT
摘要 PURPOSE:To attain highly accurate phase locking with simple constitution by adding a voltage limiter at the next stage of an LPF of a phase locked circuit which is used when a digital signal modulated by a self-clock system is demodulated. CONSTITUTION:An input pulse signal 26 and an output signal 31 of a voltage control oscillator VCO25 are supplied to a phase comparator 21 for comparison of phases. Then a signal 27 having the pulse width which advances the phase in response to the phase difference obtained from the comparison is delivered to a charge pump 22 together with a signal 28 having the pulase width which delays the phase according to said phase difference. The pump 22 converts the signal 27 or 28 into an analog quantity of voltage or current and supplies it to an LPF23. The LPF23 supplies its output voltage 29 to a limiter 24, and the limiter 24 decides the upper limit value of the voltage 29 and delivers it to the VCO25. Then the VCO25 varies the frequency in response to the input voltage and then produces a frequency near the frequency that secures synchronization since the range of input voltage is limited. Thus the synchronization is secured with a correct frequency.
申请公布号 JPS60132419(A) 申请公布日期 1985.07.15
申请号 JP19830239792 申请日期 1983.12.21
申请人 TOSHIBA KK 发明人 NAKAMURA NORIO
分类号 H03L7/08;H03L7/06;(IPC1-7):H03L7/06 主分类号 H03L7/08
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