| 摘要 |
PURPOSE:To prevent the PLL characteristic from being deteriorated and the power consumption from being increased at the test by providing both emitter terminals of two transistors (TRs) having a capacitor specifying the oscillating frequency of a controlled oscillator as integrated circuit test terminals. CONSTITUTION:When a switch 171 is closed, the DC potential VT of a DC power supply 19 is selected as 4.3V while giving the potential to the emitter of an npn TR 33 is turned off without fail, its output voltage Vout reaches 5V, that is, an H level and an npn TR 34 is turned on without fail. In turning off the switch 171 and closing a switch 172 to give the DC potential 4.3V of the DC power supply 19 to the emitter of an npn TR 34, the npn TR 34 is turned off without fail. Since the npn TR 33 is turned on without fail, the output voltage Vout goes to 4.3V, that is, clamped to an L level, and the output of the controlled oscillator 2 is set optionally by controlling the switches 171, 172. Thus, an output buffer outputting the output of the controlled oscillator to the external circuit to the IC is not required. |
