发明名称 STILL PICTURE PROCESSING CIRCUIT
摘要 <p>PURPOSE:To select a desired still picture when a delay time is within a range of storage still picture number X fetch interval by providing plural frame memories and a frame memory control circuit and storing and reproducing a picture before a desired point of time as plural still pictures. CONSTITUTION:A picture signal (a) from a picture circuit 14 is converted into a digital picture signal by an A/D conversion circuit 12 by the control of a system control circuit 15 and a frame memory control circuit 16 writes a digital data to each frame memory by each scene at a required period. When a still picture is decided by a control panel 17 at a point of time, the write to each frame memory is stopped to bring the state into a state storing plural picture data before that point of time. Then a control panel 17 sends a control signal to the frame memory control circuit 16, which controls the frame memory to read out each still picture data. Then other still picture signal is outputted from the control panel 17 sequentially.</p>
申请公布号 JPH0278385(A) 申请公布日期 1990.03.19
申请号 JP19880228421 申请日期 1988.09.14
申请人 NEC CORP;NEC SHIZUOKA LTD 发明人 SUZUKI TETSUO;MIZUNO YOSHINAO;TAKAKOSHI AKIRA
分类号 H04N19/00;G06T1/00;H04N1/21;H04N19/423;H04N19/85 主分类号 H04N19/00
代理机构 代理人
主权项
地址