| 摘要 |
The buffer circuit can be used both for transmitting and receiving data, as well as being capable of feeding back the data. The buffer circuit includes a buffering circuit (1) and a feed-back circuit (2). The buffering circuit (1) includes: a first NAND gate (NAND1), a first NOR gate (NOR1), a first MOS transistor (T1) and a second MOS transistor (T2). The feed-back circuit (2) includes: a second NAND gate (NAND2), a third MOS transistor (T1), a second NOR gate (NOR2) and a fourth MOS transistor (T4). According to the present invention, the data can be transferred from a peripheral equipment to the CPU, thereby providing a multi-function feature.
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