发明名称 |
Reception circuit |
摘要 |
First and second determination units determine amplitude levels of an input data signal in synchronization with respective first and second clocks, a phase detector detects a phase relationship between the input data signal and the second clock based on the amplitude levels, and first and second phase adjusters adjust phases of the respective first and second clocks according to a detection result of the phase detector. Further, a correction unit corrects a skew generated between the first and second clocks which arrive at the first and second determination units. A correction amount determination unit determines a correction amount corresponding to the skew in the correction unit according to the detection result in the phase detector when a phase difference set between the first and second clocks is made zero. |
申请公布号 |
US9369268(B2) |
申请公布日期 |
2016.06.14 |
申请号 |
US201514687094 |
申请日期 |
2015.04.15 |
申请人 |
FUJITSU LIMITED |
发明人 |
Hashida Takushi |
分类号 |
H04L7/033;H04L7/00;H03L7/081 |
主分类号 |
H04L7/033 |
代理机构 |
Fujitsu Patent Center |
代理人 |
Fujitsu Patent Center |
主权项 |
1. A reception circuit, comprising:
a first determination unit configured to determine a first amplitude level of an input data signal in synchronization with a first clock; a second determination unit configured to determine a second amplitude level of the input data signal in synchronization with a second clock which has a first phase difference with respect to the first clock; a phase detector configured to detect a phase relationship between the input data signal and the second clock based on the first amplitude level and the second amplitude level; a first phase adjuster configured to adjust a phase of the first clock according to a detection result of the phase detector; a second phase adjuster configured to adjust a phase of the second clock so that the second clock follow an amplitude level transition point of the input data signal according to the detection result; a correction unit configured to correct a skew generated between the first clock and the second clock which arrive at the first determination unit and the second determination unit; and a correction amount determination unit configured to determine a correction amount corresponding to the skew in the correction unit according to the detection result when the first phase difference is set to zero. |
地址 |
Kawasaki JP |