发明名称 Methods of forming memory structures
摘要 Some embodiments include memory structures having a diode over a memory cell. The memory cell can include programmable material between a pair of electrodes, with the programmable material containing a multivalent metal oxide directly against a high-k dielectric. The diode can include a first diode electrode directly over one of the memory cell electrodes and electrically coupled with the memory cell electrode, and can include a second diode electrode laterally outward of the first diode electrode and not directly over the memory cell. Some embodiments include memory arrays comprising the memory structures, and some embodiments include methods of making the memory structures.
申请公布号 US9401476(B2) 申请公布日期 2016.07.26
申请号 US201514853775 申请日期 2015.09.14
申请人 Micron Technology, Inc. 发明人 Ramaswamy Durai Vishak Nirmal;Korber Mark S.
分类号 H01L27/24;H01L45/00 主分类号 H01L27/24
代理机构 Wells St. John P.S. 代理人 Wells St. John P.S.
主权项 1. A method of forming a memory structure, comprising: forming a first rail comprising a memory cell stack; the memory cell stack comprising programmable material between a pair of electrodes; the programmable material comprising a multivalent metal oxide directly against a high-k dielectric; one of the electrodes being an uppermost memory cell electrode; forming a dielectric material over the first rail; forming a trench in the dielectric material directly over and along the first rail, the uppermost memory cell electrode being exposed along a bottom of the trench; forming an outer diode electrode material within the trench, and then subjecting the outer diode electrode material to an anisotropic etch to form liners of the outer diode electrode material along sidewalls of the trench; the liners of the outer diode electrode material being laterally outward of the uppermost memory cell electrode so that an entirety of an upper surface of the uppermost memory cell electrode is exposed after forming the liners of the outer diode electrode material; forming intermediate diode material within the trench between the liners of the outer diode electrode material, and then subjecting the intermediate diode material to an anisotropic etch to form liners of the intermediate diode material along the liners of the outer diode electrode material; the liners of the intermediate diode material being laterally outward of the uppermost memory cell electrode so that an entirety of the upper surface of the uppermost memory cell electrode is exposed after forming the liners of the intermediate diode material; forming an inner diode electrode material within the trench between the liners of the intermediate diode material, and directly over and against the upper surface of the uppermost memory cell electrode; the outer diode electrode liners, intermediate diode material and inner diode electrode material together forming a second rail over the first rail; and etching through the second rail at periodic locations to singulate memory structures from the first and second rails; the memory structures comprising memory cells from the first rails together with diodes from the second rails.
地址 Boise ID US