PWM signal generation circuit and processor system

摘要

A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.

主权项

1. A PWM signal generator circuit, comprising:
a duty rate information; and a PWM signal generation unit, wherein the PWM signal generation unit generates a PWM signal having gradually increasing duty ratio in a predetermined period, wherein the predetermined period includes a first period and a second period which is successive to the first period and has the same time length as the first period, and wherein a difference between a first duty ratio of the PWM signal generated in the first period and a second duty ratio of the PWM signal generated in the second period is determined by the duty rate information.