发明名称 ARITHMETIC UNIT FOR CONVOLUTIONAL INTEGRATION
摘要 PURPOSE:To increase the number of defrees of freedom of an arithmetic circuit, by contstituting the circuit through the combination between a multi-system delay element group and the weighting circuit of an active element, and by setting one function for an integral operation with an electric signal.
申请公布号 JPS53111257(A) 申请公布日期 1978.09.28
申请号 JP19770026398 申请日期 1977.03.09
申请人 FUJITSU LTD 发明人 OOTSUKI OSAMU;TANIGAWA KUNIHIRO;OGAWA ICHIROU
分类号 G06G7/19 主分类号 G06G7/19
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