发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To prevent the damage and contamination on the surface of a semiconductor substrate and to contrive improvement in the characteristics of a semiconductor element by a method wherein the channel region side of a source and drain region is formed in low density against a gate electrode by performing a self-alignment without exposing the surface of a semiconductor substrate. CONSTITUTION:A field insulating film 2, a p-type channel stopper region 3, an n+ type semiconductor region 5 which is one of electrodes of a capacitor, a dielectric film 6 of the capacitor and an insulating film 7 are formed on the surface of a p-type semiconductor substrate 1. then, a polycrystalline silicon film 10a is formed on a gate insulating film 9, n-type impurities are introduced by performing a thermal diffusion and an ion implantation. Subsequently, a W-silicide film 10b is formed on the whole upper surface of the polycrystalline silicon film 10a, and a resist mask 11 is formed thereon. Then, the film 10b is patterned by performing an etching using the gas is which O2 is added to CCl4 gas, for example, and then a fate electrode 10 is formed by performing a patterning on the lower layer. As the rate of selectivity between the film 10a and 10b, and the insulating film 9 consisting of a silicon oxide film 9 is 10 or thereabout, the surface of the substrate 1 is not exposed by the etching gas. Then, the side face of the films 10a and 10b is etched by performing an isotropic dry-etching using SF gas and the like, for example. As the ratio of selectivity between the films 10a and 10b, and the insulating film 9 is large, which is 100 or thereabout, the surface of the substrate 1 is not exposed.
申请公布号 JPS62183163(A) 申请公布日期 1987.08.11
申请号 JP19860023736 申请日期 1986.02.07
申请人 HITACHI LTD 发明人 NOJIRI KAZUO;TSUKUNI KAZUYUKI
分类号 H01L27/10;G11C11/34;H01L21/265;H01L21/8242;H01L27/108;H01L29/78 主分类号 H01L27/10
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