发明名称 DIVIDER FOR PROGRAMMABLE CONTROLLER
摘要 PURPOSE:To increase the computing speed of a divider through a pipeline structure by providing a controller which controls a division part where the quotient and the remainder are obtained from a dividend and a divisor. CONSTITUTION:A controller 10 controls a division part where the quotient M and the remainder R are obtained from a dividend Dd and a divisor Ds. Then the controller 10 obtains the repeating frequency from the Dd and the Ds with the input of an arithmetic start signal (start) after the reception of the Dd and the Ds from a programmable controller. Simultaneously, the controller 10 decides that the subtracting operations are carried out by the number of times equal to the number of times of repeating and outputs an arithmetic end signal to deliver the M and the Ds. Thus the programmable controller is not required to transfer a signal related to the division in a period when an arithmetic end signal (end) is received after the output of the signal (start), then, can carry out other processing operations during a dividing operation. Thus, the computing speed of a divider is increased through a pipeline structure.
申请公布号 JPH0444120(A) 申请公布日期 1992.02.13
申请号 JP19900152255 申请日期 1990.06.11
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 KITADOU MASAHARU;KURODA MINORU
分类号 G06F7/537;G05B19/05;G06F7/52;G06F7/535 主分类号 G06F7/537
代理机构 代理人
主权项
地址