发明名称 DISPLAY CONTROLLER
摘要 PURPOSE:To develop character pattern data into a bit map at a high speed by eliminating the need for performing a process for character pattern development by a host CPU and also eliminating the overhead between an I/O bus and a display device. CONSTITUTION:A bit map display device is equipped with a bit map VRAM 5, a character pattern data CG 4, and an address generating means 14 for VRAM writing and the display controller is equipped with a function which can transfers the character pattern data from the CG to the VRAM not through an I/O bus 2 in synchronism with the timing signal from the host CPU 1.
申请公布号 JPH0683324(A) 申请公布日期 1994.03.25
申请号 JP19920230911 申请日期 1992.08.31
申请人 HITACHI LTD 发明人 TERADA KOICHI;TANAKA TOSHIO;HARA NOBUHIKO
分类号 G06F3/153;G06F17/21;G09G5/22;G09G5/36;G09G5/40 主分类号 G06F3/153
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