发明名称 MEMORY ADDRESSING FOR MASSIVELY PARALLEL PROCESSING SYSTEMS
摘要 A system and address method for extracting a PE number and offset from an array index. According to one aspect of the present invention, a processing element number is assigned to each processing element, a local memory address is assigned to each memory location and a linearized index is assigned to each array element in an array. The processing element number of the processing element in which a particular array element is stored is computed as a function of a linearized index associated with the array element and a distribution specification associated with the array. In addition, a local memory address associated with the array element is computed as a function of the linearized index and the distribution specification.
申请公布号 WO9516239(A1) 申请公布日期 1995.06.15
申请号 WO1994US14183 申请日期 1994.12.09
申请人 CRAY RESEARCH, INC. 发明人 OBERLIN, STEVEN, M.;EBERHART, JANET, M.;ELSESSER, GARY, W.;FROMM, ERIC, C.;MACDONALD, THOMAS, A.;PASE, DOUGLAS, M.;PASSINT, RANDALL, S.
分类号 G06F12/06;G06F15/173;(IPC1-7):G06F15/16 主分类号 G06F12/06
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