发明名称 SCAN PASS CIRCUIT, AND SCAN PASS CIRCUIT DESIGNING DEVICE
摘要 PURPOSE: To apply a partial scan method even to a circuit using a multi-phase clock or a gated clock, improve processing speed, and reduce an area. CONSTITUTION: A circuit is composed of flipflops 1, 5, 6, and scan flipflops 22-24. The scan flipflops 22-24 are those replaced for flipflops composing the circuit for which different clock signals from clock signals of the circuit are used in at least one destination of outputs. To the scan flipflops 22-24, scan test wiring is applied by scanning in and scanning out. Clock control circuits 11-13 fix clock signals to the flipflops 1, 5, 6 and the scan flipflops 22-24 at a specified value when the specified value is set by a scan sample signal.
申请公布号 JPH08105941(A) 申请公布日期 1996.04.23
申请号 JP19940240464 申请日期 1994.10.05
申请人 NEC CORP 发明人 NAKAMURA YOSHIYUKI
分类号 G01R31/28;G01R31/3185;G06F11/22;G06F17/50 主分类号 G01R31/28
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