| 摘要 |
<p>A messaging scheme that conserves system memory bandwidth and maintains cache coherency during a victim block write operation in a multiprocessing computer system (10) is described. A target node (72) receives a memory cancel response corresponding to a transaction, and aborts processing of the transaction in response to the memory cancel response. In one embodiment, the transaction is a victim block write and the memory cancel response is received from a source node (70). In another embodiment, the transaction is a read operation and the memory cancel response is received from a different node (76) having a modified copy of the data addressed by the read operation.</p> |
