发明名称 HIGH SPEED SIGNAL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To make it unnecessary to facilitate any measures to a radiation noise from board wiring by maintaining the operating frequency of a synchronizing bus at a high speed by distributing a low speed synchronizing signal. SOLUTION: When completing preparation for oscillating internal clocks, internal clock generating circuits 11, 12, and 13 of respective LSI 2, 3, and 4 respectively transmit oscillation preparation completion signals CLK- EN 1, 2, and 3 to a clock synchronizing signal generating circuit 14. Then, the clock synchronizing signal generating circuit 14 transmits low speed clock synchronizing signals SYNC- PULSE to each LSI 2, 3, and 4. Thus, the internal clock generating circuits in the respective LSI 2, 3, and 4 respectively generate high speed bus clock signals CLK 1, 2, and 3 by multiplying the signals of crystal oscillators 8, 9, and 10 synchronously with the clock synchronizing signals SYNC- PULSE, and transmit them to a common synchronizing bus 1. Therefore, the operating frequency of the synchronizing bus 1 to which the LSI 2, 3, and 4 are connected can be maintained at a high speed as it is, and the clock synchronizing signal SYNC- PULSE running through a signal line can be transmitted at a low speed so that it is possible to reduce any radiation noise from a board.
申请公布号 JP2002258979(A) 申请公布日期 2002.09.13
申请号 JP20010061876 申请日期 2001.03.06
申请人 NEC SYSTEM TECHNOLOGIES LTD 发明人 TACHIBANA HIDEYUKI
分类号 G06F13/36;G06F1/10;G06F1/12;H03L7/00;H04L7/00;H04L7/04 主分类号 G06F13/36
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