| 摘要 |
A pixel circuit 10 is provided with TFTs 12 and 13 and an organic EL element 15 on a current path connecting a power supply line VPk and an electrode having a common potential Vcom. A display device 100 simultaneously performs initialization to pixel circuits 10 in a plurality of rows, simultaneously perform threshold detection to the pixel circuits 10 in the plurality of rows, sequentially writes data to the pixel circuits 10 row by row, and makes the organic EL elements 15 included in the pixel circuits 10 in the plurality of rows emit light in the same period. In a period from completion of threshold detection to start of light emission, the TFTs 11 and 13 are controlled to an off state, and a potential VP_C which is substantially equal to the common potential Vcom is applied to the power supply line VPk. Consequently, leak current flowing through the TFTs 12 and 13 can be suppressed, and the fluctuation in the node potential in the pixel circuit 10 in a standby period can be prevented. |
| 主权项 |
1. A current drive type display device, comprising:
a plurality of pixel circuits disposed in a row direction and a column direction; a plurality of scanning signal lines each connected to the pixel circuits in the same row; a plurality of data signal lines each connected to the pixel circuits in the same column; one or more control lines each connected to the pixel circuits in a plurality of rows; one or more power supply lines each connected to the pixel circuits in the plurality of rows; a drive circuit configured to drive the scanning signal lines, the data signal lines, and the one or more control lines; and a power supply circuit configured to selectively apply a plurality of potentials to the power supply line(s), wherein each of the pixel circuits includes:
a light emitting element provided on a current path connecting the power supply line and a conductive member to which a common potential is fixedly applied, and having one end connected to the conductive member;a drive transistor provided on the current path, and having one of conduction terminals connected to the other end of the light emitting element;a write control transistor provided between the data signal line and a control terminal of the drive transistor, and having a control terminal connected to the scanning signal line;a light emission control transistor provided on the current path between the power supply line and the other conduction terminal of the drive transistor, and having a control terminal connected to the control line; anda capacitor provided between the control terminal and the conduction terminal on the light emitting element side of the drive transistor, the drive circuit and the power supply circuit configured to: simultaneously perform initialization to the pixel circuits in the plurality of rows, simultaneously perform threshold detection to the pixel circuits in the plurality of rows, sequentially write data to the pixel circuits row by row, and perform a control to make the light emitting elements included in the pixel circuits in the plurality of rows emit light in the same period, the power supply circuit configured to apply a first potential substantially equal to the common potential to the power supply line connected to a pixel circuit, in a period from completion of detecting threshold to start of light emission of the pixel circuit, and the pixel circuit is configured to be controlled such that
in an initialization period, the write control transistor and the light emission control transistor are in an on state, a potential with which the drive transistor enters an on state is applied to the data signal line, and a second potential for initialization is applied to the power supply line,in a threshold detection period, the write control transistor and the light emission control transistor are in the on state, a potential for threshold detection is applied to the data signal line, and a third potential for threshold detection is applied to the power supply line,in a period from completion of threshold detection to start of data writing and a period from completion of data writing to start of light emission, the write control transistor and the light emission control transistor are in an off state,in a data writing period, the write control transistor is in the on state, the light emission control transistor is in the off state, and a data potential is applied to the data signal line, andin a light emission period, the write control transistor is in the off state, the light emission control transistor is in the on state, and a fourth potential for light emission is applied to the power supply line. |
